MFEM v4.10.0
Finite element discretization library
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device.hpp
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1// Copyright (c) 2010-2026, Lawrence Livermore National Security, LLC. Produced
2// at the Lawrence Livermore National Laboratory. All Rights reserved. See files
3// LICENSE and NOTICE for details. LLNL-CODE-806117.
4//
5// This file is part of the MFEM library. For more information and source code
6// availability visit https://mfem.org.
7//
8// MFEM is free software; you can redistribute it and/or modify it under the
9// terms of the BSD-3 license. We welcome feedback and contributions, see file
10// CONTRIBUTING.md for details.
11
12#ifndef MFEM_DEVICE_HPP
13#define MFEM_DEVICE_HPP
14
15#include "enzyme.hpp"
16#include "globals.hpp"
17#include "mem_manager.hpp"
18
19#ifdef MFEM_USE_RAJA
20#include "RAJA/RAJA.hpp"
21#endif
22
23#include <memory>
24#include <string>
25
26namespace mfem
27{
28
29/// MFEM backends.
30/** Individual backends will generally implement only a subset of the kernels
31 implemented by the default CPU backend. The goal of the backends is to
32 accelerate data-parallel portions of the code and they can use a device
33 memory space (e.g. GPUs) or share the memory space of the host (OpenMP). */
34struct Backend
35{
36 /** @brief In the documentation below, we use square brackets to indicate the
37 type of the backend: host or device. */
38 enum Id: unsigned long
39 {
40 /// [host] Default CPU backend: sequential execution on each MPI rank.
41 CPU = 1 << 0,
42 /// [host] OpenMP backend. Enabled when MFEM_USE_OPENMP = YES.
43 OMP = 1 << 1,
44 /// [device] CUDA backend. Enabled when MFEM_USE_CUDA = YES.
45 CUDA = 1 << 2,
46 /// [device] HIP backend. Enabled when MFEM_USE_HIP = YES.
47 HIP = 1 << 3,
48 /** @brief [host] RAJA CPU backend: sequential execution on each MPI rank.
49 Enabled when MFEM_USE_RAJA = YES. */
50 RAJA_CPU = 1 << 4,
51 /** @brief [host] RAJA OpenMP backend. Enabled when MFEM_USE_RAJA = YES
52 and MFEM_USE_OPENMP = YES. */
53 RAJA_OMP = 1 << 5,
54 /** @brief [device] RAJA CUDA backend. Enabled when MFEM_USE_RAJA = YES
55 and MFEM_USE_CUDA = YES. */
56 RAJA_CUDA = 1 << 6,
57 /** @brief [device] RAJA HIP backend. Enabled when MFEM_USE_RAJA = YES
58 and MFEM_USE_HIP = YES. */
59 RAJA_HIP = 1 << 7,
60 /** @brief [host] OCCA CPU backend: sequential execution on each MPI rank.
61 Enabled when MFEM_USE_OCCA = YES. */
62 OCCA_CPU = 1 << 8,
63 /// [host] OCCA OpenMP backend. Enabled when MFEM_USE_OCCA = YES.
64 OCCA_OMP = 1 << 9,
65 /** @brief [device] OCCA CUDA backend. Enabled when MFEM_USE_OCCA = YES
66 and MFEM_USE_CUDA = YES. */
67 OCCA_CUDA = 1 << 10,
68 /** @brief [host] CEED CPU backend. GPU backends can still be used, but
69 with expensive memory transfers. Enabled when MFEM_USE_CEED = YES. */
70 CEED_CPU = 1 << 11,
71 /** @brief [device] CEED CUDA backend working together with the CUDA
72 backend. Enabled when MFEM_USE_CEED = YES and MFEM_USE_CUDA = YES.
73 NOTE: The current default libCEED CUDA backend is non-deterministic! */
74 CEED_CUDA = 1 << 12,
75 /** @brief [device] CEED HIP backend working together with the HIP
76 backend. Enabled when MFEM_USE_CEED = YES and MFEM_USE_HIP = YES. */
77 CEED_HIP = 1 << 13,
78 /** @brief [device] Debug backend: host memory is READ/WRITE protected
79 while a device is in use. It allows to test the "device" code-path
80 (using separate host/device memory pools and host <-> device
81 transfers) without any GPU hardware. As 'DEBUG' is sometimes used
82 as a macro, `_DEVICE` has been added to avoid conflicts. */
83 DEBUG_DEVICE = 1 << 14
84 };
85
86 /** @brief Additional useful constants. For example, the *_MASK constants can
87 be used with Device::Allows(). */
88 enum
89 {
90 /// Number of backends: from (1 << 0) to (1 << (NUM_BACKENDS-1)).
92
93 /// Biwise-OR of all CPU backends
95 /// Biwise-OR of all CUDA backends
97 /// Biwise-OR of all HIP backends
99 /// Biwise-OR of all OpenMP backends
101 /// Bitwise-OR of all CEED backends
103 /// Biwise-OR of all device backends
105 /// Biwise-OR of all RAJA backends
107 /// Biwise-OR of all OCCA backends
109 };
110};
111
112
113/** @brief The MFEM Device class abstracts hardware devices such as GPUs, as
114 well as programming models such as CUDA, OCCA, RAJA and OpenMP. */
115/** This class represents a "virtual device" with the following properties:
116 - At most one object of this class can be constructed and that object is
117 controlled by its static methods.
118 - If no Device object is constructed, the static methods will use a default
119 global object which is never configured and always uses Backend::CPU.
120 - Once configured, the object cannot be re-configured during the program
121 lifetime.
122 - MFEM classes use this object to determine where (host or device) to
123 perform an operation and which backend implementation to use.
124 - Multiple backends can be configured at the same time; currently, a fixed
125 priority order is used to select a specific backend from the list of
126 configured backends. See the Backend class and the Configure() method in
127 this class for details. */
129{
130private:
131 friend class MemoryManager;
132
133 static bool device_env, mem_host_env, mem_device_env, mem_types_set;
134 MFEM_ENZYME_INACTIVE static MFEM_EXPORT Device device_singleton;
135
136 int dev = 0; ///< Device ID of the configured device.
137 int ngpu = -1; ///< Number of detected devices; -1: not initialized.
138
139 /// Bitwise-OR of all configured backends.
140 unsigned long backends = Backend::CPU;
141
142 /// Set to true during configuration, except in 'device_singleton'.
143 bool destroy_mm = false;
144 bool mpi_gpu_aware = false;
145
146 MemoryType host_mem_type = MemoryType::HOST; ///< Current Host MemoryType
147 MemoryClass host_mem_class = MemoryClass::HOST; ///< Current Host MemoryClass
148
149 /// Current Device MemoryType
150 MemoryType device_mem_type = MemoryType::HOST;
151 /// Current Device MemoryClass
152 MemoryClass device_mem_class = MemoryClass::HOST;
153
154 // Delete copy constructor and copy assignment.
155 Device(const Device &) = delete;
156 Device &operator=(const Device &) = delete;
157
158 // Access the Device singleton.
159 static Device& Get() { return device_singleton; }
160
161 /// Setup switcher based on configuration settings.
162 void Setup(const std::string &device_option, const int device_id);
163
164 /// Configure host/device MemoryType/MemoryClass.
165 void UpdateMemoryTypeAndClass(const std::string &device_option);
166
167 /// Configure the backends to include @a b.
168 void MarkBackend(Backend::Id b) { backends |= b; }
169
170public:
171 /** @brief Default constructor. Unless Configure() is called later, the
172 default Backend::CPU will be used. */
173 /** @note At most one Device object can be constructed during the lifetime of
174 a program.
175 @note This object should be destroyed after all other MFEM objects that
176 use the Device are destroyed. */
177 Device();
178
179 /** @brief Construct a Device and configure it based on the @a device string.
180 See Configure() for more details. */
181 /** @note At most one Device object can be constructed during the lifetime of
182 a program.
183 @note This object should be destroyed after all other MFEM objects that
184 use the Device are destroyed. */
185 Device(const std::string &device, const int device_id = 0)
186 { Configure(device, device_id); }
187
188 /// Destructor.
189 ~Device();
190
191 /// Configure the Device backends.
192 /** The string parameter @a device must be a comma-separated list of backend
193 string names (see below). The @a device_id argument specifies the ID of
194 the actual devices (e.g. GPU) to use.
195 - The available backends are described by the Backend class.
196 - The string name of a backend is the lowercase version of the
197 Backend::Id enumeration constant with '_' replaced by '-', e.g. the
198 string name of 'RAJA_CPU' is 'raja-cpu'. The string name of the debug
199 backend (Backend::Id 'DEBUG_DEVICE') is exceptionally set to 'debug'.
200 - The 'cpu' backend is always enabled with lowest priority.
201 - The current backend priority from highest to lowest is:
202 'ceed-cuda', 'occa-cuda', 'raja-cuda', 'cuda',
203 'ceed-hip', 'hip', 'debug',
204 'occa-omp', 'raja-omp', 'omp',
205 'ceed-cpu', 'occa-cpu', 'raja-cpu', 'cpu'.
206 - The following backend aliases are also available: 'ceed-gpu',
207 'occa-gpu', 'raja-gpu', and 'gpu' where they alias their respective
208 '*-cuda' or '*-hip' backends depending on the MFEM build-time
209 configuration.
210 - Multiple backends can be configured at the same time.
211 - Only one 'occa-*' backend can be configured at a time.
212 - The backend 'occa-cuda' enables the 'cuda' backend unless 'raja-cuda'
213 is already enabled.
214 - The backend 'occa-omp' enables the 'omp' backend (if MFEM was built
215 with MFEM_USE_OPENMP=YES) unless 'raja-omp' is already enabled.
216 - Only one 'ceed-*' backend can be configured at a time.
217 - The backend 'ceed-cpu' delegates to a libCEED CPU backend the setup and
218 evaluation of the operator.
219 - The backend 'ceed-cuda' delegates to a libCEED CUDA backend the setup
220 and evaluation of operators and enables the 'cuda' backend to avoid
221 transfers between host and device.
222 - The backend 'ceed-hip' delegates to a libCEED HIP backend the setup
223 and evaluation of operators and enables the 'hip' backend to avoid
224 transfers between host and device.
225 - The 'debug' backend should not be combined with other device backends.
226
227 @note If the device is actually enabled, this method will also update the
228 current host/device MemoryType and MemoryClass. */
229 void Configure(const std::string &device, const int device_id = 0);
230
231 /// Set the default host and device MemoryTypes, @a h_mt and @a d_mt.
232 /** The host and device MemoryTypes are also set to be dual to each other.
233
234 These two MemoryType%s are used by most MFEM classes when allocating
235 memory used on host and device, respectively.
236
237 This method can only be called before Device construction and
238 configuration, and the specified memory types must be compatible with
239 the subsequent Device configuration. */
240 static void SetMemoryTypes(MemoryType h_mt, MemoryType d_mt);
241
242 /// Print the configuration of the MFEM virtual device object.
243 void Print(std::ostream &os = mfem::out);
244
245 /// Return true if Configure() has been called previously.
246 static inline bool IsConfigured() { return Get().ngpu >= 0; }
247
248 /// Return true if an actual device (e.g. GPU) has been configured.
249 static inline bool IsAvailable() { return Get().ngpu > 0; }
250
251 /// Return true if any backend other than Backend::CPU is enabled.
252 static inline bool IsEnabled() { return Get().backends & ~(Backend::CPU); }
253
254 /// The opposite of IsEnabled().
255 static inline bool IsDisabled() { return !IsEnabled(); }
256
257 /// Get the device ID of the configured device.
258 static inline int GetId() { return Get().dev; }
259
260 /// Get the number of available devices (may be called before configuration).
261 static int GetDeviceCount();
262
263 /// Gets a string representation of the GPU UUID.
264 /// 0 <= @a device_id < GetDeviceCount()
265 static std::string GetUUID(const int device_id = 0);
266
267 /** @brief Return true if any of the backends in the backend mask, @a b_mask,
268 are allowed. */
269 /** This method can be used with any of the Backend::Id constants, the
270 Backend::*_MASK, or combinations of those. */
271 static inline bool Allows(unsigned long b_mask)
272 { return Get().backends & b_mask; }
273
274#if defined(MFEM_USE_RAJA) && \
275 (defined(RAJA_ENABLE_CUDA) || defined(RAJA_ENABLE_HIP))
276 static inline auto GetRajaResource()
277 {
278#if defined(RAJA_ENABLE_CUDA)
279 return RAJA::resources::Cuda::CudaFromStream(0, Get().GetId());
280#elif defined(RAJA_ENABLE_HIP)
281 return RAJA::resources::Hip::HipFromStream(0, Get().GetId());
282#endif
283 }
284#endif
285
286 /** @brief Get the current Host MemoryType. This is the MemoryType used by
287 most MFEM classes when allocating memory used on the host.
288 */
289 static inline MemoryType GetHostMemoryType() { return Get().host_mem_type; }
290
291 /** @brief Get the current Host MemoryClass. This is the MemoryClass used
292 by most MFEM host Memory objects. */
293 static inline MemoryClass GetHostMemoryClass() { return Get().host_mem_class; }
294
295 /** @brief Get the current Device MemoryType. This is the MemoryType used by
296 most MFEM classes when allocating memory to be used with device kernels.
297 */
298 static inline MemoryType GetDeviceMemoryType() { return Get().device_mem_type; }
299
300 /// (DEPRECATED) Equivalent to GetDeviceMemoryType().
301 /** @deprecated Use GetDeviceMemoryType() instead. */
302 static inline MemoryType GetMemoryType() { return Get().device_mem_type; }
303
304 /** @brief Get the current Device MemoryClass. This is the MemoryClass used
305 by most MFEM device kernels to access Memory objects. */
306 static inline MemoryClass GetDeviceMemoryClass() { return Get().device_mem_class; }
307
308 /// (DEPRECATED) Equivalent to GetDeviceMemoryClass().
309 /** @deprecated Use GetDeviceMemoryClass() instead. */
310 static inline MemoryClass GetMemoryClass() { return Get().device_mem_class; }
311
312 /** @brief Manually set the status of GPU-aware MPI flag for use in MPI
313 communication routines which have optimized implementations for device
314 buffers. */
315 static void SetGPUAwareMPI(const bool force = true)
316 { Get().mpi_gpu_aware = force; }
317
318 /// Get the status of GPU-aware MPI flag.
319 static bool GetGPUAwareMPI() { return Get().mpi_gpu_aware; }
320
321 /** Query the device driver for what memory type a given @a ptr is allocated
322 * with. */
323 static MemoryType QueryMemoryType(const void* ptr);
324
325 /** @brief The number of hardware compute units/streaming multiprocessors
326 available on a given compute device @a device_id. */
327 static int NumMultiprocessors(int device_id);
328
329 /// Same as NumMultiprocessors(int), for the currently active device.
330 static int NumMultiprocessors();
331
332 /** @brief The number of threads in a warp on a given compute device
333 @a device_id. */
334 static int WarpSize(int device_id);
335
336 /// Same as WarpSize(int), for the currently active device.
337 static int WarpSize();
338
339 /** @brief Gets the @a free and @a total memory on the device. */
340 static void DeviceMem(size_t *free, size_t *total);
341};
342
343
344// Inline Memory access functions using the mfem::Device DeviceMemoryClass or
345// the mfem::Device HostMemoryClass.
346
347/** @brief Return the memory class to be used by the functions Read(), Write(),
348 and ReadWrite(), while setting the device use flag in @a mem, if @a on_dev
349 is true. */
350template <typename T>
351inline MemoryClass GetMemoryClass(const Memory<T> &mem, bool on_dev)
352{
353 if (!on_dev)
354 {
356 }
357 else
358 {
359 mem.UseDevice(true);
361 }
362}
363
364/** @brief Get a pointer for read access to @a mem with the mfem::Device's
365 DeviceMemoryClass, if @a on_dev = true, or the mfem::Device's
366 HostMemoryClass, otherwise. */
367/** Also, if @a on_dev = true, the device flag of @a mem will be set. */
368template <typename T>
369inline const T *Read(const Memory<T> &mem, int size, bool on_dev = true)
370{
371 return mem.Read(GetMemoryClass(mem, on_dev), size);
372}
373
374/** @brief Shortcut to Read(const Memory<T> &mem, int size, false) */
375template <typename T>
376inline const T *HostRead(const Memory<T> &mem, int size)
377{
378 return mfem::Read(mem, size, false);
379}
380
381/** @brief Get a pointer for write access to @a mem with the mfem::Device's
382 DeviceMemoryClass, if @a on_dev = true, or the mfem::Device's
383 HostMemoryClass, otherwise. */
384/** Also, if @a on_dev = true, the device flag of @a mem will be set. */
385template <typename T>
386inline T *Write(Memory<T> &mem, int size, bool on_dev = true)
387{
388 return mem.Write(GetMemoryClass(mem, on_dev), size);
389}
390
391/** @brief Shortcut to Write(const Memory<T> &mem, int size, false) */
392template <typename T>
393inline T *HostWrite(Memory<T> &mem, int size)
394{
395 return mfem::Write(mem, size, false);
396}
397
398/** @brief Get a pointer for read+write access to @a mem with the mfem::Device's
399 DeviceMemoryClass, if @a on_dev = true, or the mfem::Device's
400 HostMemoryClass, otherwise. */
401/** Also, if @a on_dev = true, the device flag of @a mem will be set. */
402template <typename T>
403inline T *ReadWrite(Memory<T> &mem, int size, bool on_dev = true)
404{
405 return mem.ReadWrite(GetMemoryClass(mem, on_dev), size);
406}
407
408/** @brief Shortcut to ReadWrite(Memory<T> &mem, int size, false) */
409template <typename T>
410inline T *HostReadWrite(Memory<T> &mem, int size)
411{
412 return mfem::ReadWrite(mem, size, false);
413}
414
415} // namespace mfem
416
417#endif // MFEM_DEVICE_HPP
The MFEM Device class abstracts hardware devices such as GPUs, as well as programming models such as ...
Definition device.hpp:129
static MemoryType GetHostMemoryType()
Get the current Host MemoryType. This is the MemoryType used by most MFEM classes when allocating mem...
Definition device.hpp:289
~Device()
Destructor.
Definition device.cpp:158
static MemoryClass GetMemoryClass()
(DEPRECATED) Equivalent to GetDeviceMemoryClass().
Definition device.hpp:310
static void DeviceMem(size_t *free, size_t *total)
Gets the free and total memory on the device.
Definition device.cpp:704
static MemoryClass GetHostMemoryClass()
Get the current Host MemoryClass. This is the MemoryClass used by most MFEM host Memory objects.
Definition device.hpp:293
void Configure(const std::string &device, const int device_id=0)
Configure the Device backends.
Definition device.cpp:191
static bool IsAvailable()
Return true if an actual device (e.g. GPU) has been configured.
Definition device.hpp:249
static void SetGPUAwareMPI(const bool force=true)
Manually set the status of GPU-aware MPI flag for use in MPI communication routines which have optimi...
Definition device.hpp:315
static auto GetRajaResource()
Definition device.hpp:276
static MemoryType GetMemoryType()
(DEPRECATED) Equivalent to GetDeviceMemoryType().
Definition device.hpp:302
static int NumMultiprocessors()
Same as NumMultiprocessors(int), for the currently active device.
Definition device.cpp:764
static bool IsConfigured()
Return true if Configure() has been called previously.
Definition device.hpp:246
static MemoryType QueryMemoryType(const void *ptr)
Definition device.cpp:622
static std::string GetUUID(const int device_id=0)
Definition device.cpp:723
void Print(std::ostream &os=mfem::out)
Print the configuration of the MFEM virtual device object.
Definition device.cpp:319
static bool Allows(unsigned long b_mask)
Return true if any of the backends in the backend mask, b_mask, are allowed.
Definition device.hpp:271
Device(const std::string &device, const int device_id=0)
Construct a Device and configure it based on the device string. See Configure() for more details.
Definition device.hpp:185
static void SetMemoryTypes(MemoryType h_mt, MemoryType d_mt)
Set the default host and device MemoryTypes, h_mt and d_mt.
Definition device.cpp:296
static bool GetGPUAwareMPI()
Get the status of GPU-aware MPI flag.
Definition device.hpp:319
static MemoryClass GetDeviceMemoryClass()
Get the current Device MemoryClass. This is the MemoryClass used by most MFEM device kernels to acces...
Definition device.hpp:306
static int GetId()
Get the device ID of the configured device.
Definition device.hpp:258
static int WarpSize()
Same as WarpSize(int), for the currently active device.
Definition device.cpp:792
static int GetDeviceCount()
Get the number of available devices (may be called before configuration).
Definition device.cpp:427
static bool IsEnabled()
Return true if any backend other than Backend::CPU is enabled.
Definition device.hpp:252
Device()
Default constructor. Unless Configure() is called later, the default Backend::CPU will be used.
Definition device.cpp:76
static MemoryType GetDeviceMemoryType()
Get the current Device MemoryType. This is the MemoryType used by most MFEM classes when allocating m...
Definition device.hpp:298
static bool IsDisabled()
The opposite of IsEnabled().
Definition device.hpp:255
Class used by MFEM to store pointers to host and/or device memory.
T * Write(MemoryClass mc, int size)
Get write-only access to the memory with the given MemoryClass.
T * ReadWrite(MemoryClass mc, int size)
Get read-write access to the memory with the given MemoryClass.
bool UseDevice() const
Read the internal device flag.
const T * Read(MemoryClass mc, int size) const
Get read-only access to the memory with the given MemoryClass.
real_t b
Definition lissajous.cpp:42
const T * Read(const Memory< T > &mem, int size, bool on_dev=true)
Get a pointer for read access to mem with the mfem::Device's DeviceMemoryClass, if on_dev = true,...
Definition device.hpp:369
MemoryClass GetMemoryClass(const Memory< T > &mem, bool on_dev)
Return the memory class to be used by the functions Read(), Write(), and ReadWrite(),...
Definition device.hpp:351
T * HostReadWrite(Memory< T > &mem, int size)
Shortcut to ReadWrite(Memory<T> &mem, int size, false)
Definition device.hpp:410
const T * HostRead(const Memory< T > &mem, int size)
Shortcut to Read(const Memory<T> &mem, int size, false)
Definition device.hpp:376
T * Write(Memory< T > &mem, int size, bool on_dev=true)
Get a pointer for write access to mem with the mfem::Device's DeviceMemoryClass, if on_dev = true,...
Definition device.hpp:386
OutStream out(std::cout)
Global stream used by the library for standard output. Initially it uses the same std::streambuf as s...
Definition globals.hpp:66
MemoryClass
Memory classes identify sets of memory types.
T * ReadWrite(Memory< T > &mem, int size, bool on_dev=true)
Get a pointer for read+write access to mem with the mfem::Device's DeviceMemoryClass,...
Definition device.hpp:403
T * HostWrite(Memory< T > &mem, int size)
Shortcut to Write(const Memory<T> &mem, int size, false)
Definition device.hpp:393
MemoryType
Memory types supported by MFEM.
@ HOST
Host memory; using new[] and delete[].
MFEM backends.
Definition device.hpp:35
Id
In the documentation below, we use square brackets to indicate the type of the backend: host or devic...
Definition device.hpp:39
@ RAJA_OMP
[host] RAJA OpenMP backend. Enabled when MFEM_USE_RAJA = YES and MFEM_USE_OPENMP = YES.
Definition device.hpp:53
@ RAJA_CUDA
[device] RAJA CUDA backend. Enabled when MFEM_USE_RAJA = YES and MFEM_USE_CUDA = YES.
Definition device.hpp:56
@ DEBUG_DEVICE
[device] Debug backend: host memory is READ/WRITE protected while a device is in use....
Definition device.hpp:83
@ RAJA_CPU
[host] RAJA CPU backend: sequential execution on each MPI rank. Enabled when MFEM_USE_RAJA = YES.
Definition device.hpp:50
@ OMP
[host] OpenMP backend. Enabled when MFEM_USE_OPENMP = YES.
Definition device.hpp:43
@ HIP
[device] HIP backend. Enabled when MFEM_USE_HIP = YES.
Definition device.hpp:47
@ OCCA_OMP
[host] OCCA OpenMP backend. Enabled when MFEM_USE_OCCA = YES.
Definition device.hpp:64
@ RAJA_HIP
[device] RAJA HIP backend. Enabled when MFEM_USE_RAJA = YES and MFEM_USE_HIP = YES.
Definition device.hpp:59
@ OCCA_CUDA
[device] OCCA CUDA backend. Enabled when MFEM_USE_OCCA = YES and MFEM_USE_CUDA = YES.
Definition device.hpp:67
@ CEED_CPU
[host] CEED CPU backend. GPU backends can still be used, but with expensive memory transfers....
Definition device.hpp:70
@ OCCA_CPU
[host] OCCA CPU backend: sequential execution on each MPI rank. Enabled when MFEM_USE_OCCA = YES.
Definition device.hpp:62
@ CEED_CUDA
[device] CEED CUDA backend working together with the CUDA backend. Enabled when MFEM_USE_CEED = YES a...
Definition device.hpp:74
@ CPU
[host] Default CPU backend: sequential execution on each MPI rank.
Definition device.hpp:41
@ CUDA
[device] CUDA backend. Enabled when MFEM_USE_CUDA = YES.
Definition device.hpp:45
@ CEED_HIP
[device] CEED HIP backend working together with the HIP backend. Enabled when MFEM_USE_CEED = YES and...
Definition device.hpp:77
@ RAJA_MASK
Biwise-OR of all RAJA backends.
Definition device.hpp:106
@ DEVICE_MASK
Biwise-OR of all device backends.
Definition device.hpp:104
@ CEED_MASK
Bitwise-OR of all CEED backends.
Definition device.hpp:102
@ OCCA_MASK
Biwise-OR of all OCCA backends.
Definition device.hpp:108
@ HIP_MASK
Biwise-OR of all HIP backends.
Definition device.hpp:98
@ CPU_MASK
Biwise-OR of all CPU backends.
Definition device.hpp:94
@ NUM_BACKENDS
Number of backends: from (1 << 0) to (1 << (NUM_BACKENDS-1)).
Definition device.hpp:91
@ CUDA_MASK
Biwise-OR of all CUDA backends.
Definition device.hpp:96
@ OMP_MASK
Biwise-OR of all OpenMP backends.
Definition device.hpp:100